1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Related Art
In recent years, a development of method for connecting semiconductor element by various wire bonding methods is energetically performed, with the object of realization of high reliability of semiconductor elements. As this kind of technique, there is one, which is described in the Japanese Laid-Open Patent Publication No. 2001-237263. FIG. 4 shows a semiconductor device described in the literature.
The semiconductor device (a high frequency circuit device 200) is composed of a high frequency semiconductor substrate 204 and a high frequency circuit substrate 206 on a base plate 201. A high frequency transmission line 205 is provided on the high frequency circuit substrate 206.
On the other hand, a bonding pad 208 is formed on the high frequency semiconductor substrate 204. Metal bumps 211 are formed on the bonding pad 208. A bonding wire 207 lengthened from a starting point of wire bonding 209 is connected to the metal bumps 211.
On this technique, in order to be obtained sufficient maintenance of reliability in a connecting portion, the metal bumps 211 of gold or copper are formed previously on the bonding pads 208, to which wire bonding is carried out.
Further, as this kind of technique, there is one, which is described in the Japanese Laid-Open Patent Publication No. 2001-15677. FIG. 5 shows a semiconductor device described in the literature.
This semiconductor device 300 is composed of a lower side semiconductor chip 303 and an upper side semiconductor chip 306 on an interconnect substrate 301. The lower side semiconductor chip 303 is provided in face down to be connected to the interconnect substrate 301 through gold ball bumps 304a, 304b. The semiconductor chip 306 is provided on the lower side semiconductor chip 303 through an adhesive 307 so that a main face of the semiconductor chip 306 faces upward. A side face and an underside of the semiconductor chip 303 are covered with a adhesive resin layer 309, thus the semiconductor chip 303 is fixed on the interconnect substrate 301 with the adhesive resin layer 309.
Electrode pads 310a, 310b, made of aluminum or the like are formed, on a top surface of the upper side semiconductor chip 306. Connection pads 302a, 302b made of aluminum or the like are also formed, on a top surface of the interconnect substrate 301. The electrode pads 310a, 310b are respectively connected to the connection pads 302a, 302b with bonding wires 308a, 308b. 
In this technique, the above described structure is adopted, with the object to mount a plurality of semiconductor elements with high density. Further, the wire bonding is directly performed on the electrode pads 310a, 310b, and the connection pads 302a, 302b made of aluminum or the like.
Further, as this kind of technique, there is one, which is described in the Japanese Laid-Open Patent Publication No. 1999-97476. FIG. 6 shows a semiconductor device described in the literature.
The semiconductor device 400 is provided with a lead wire 405 within an insulating film 410. A semiconductor chip 401 is formed on the insulating film 410 and the lead wire 405 through an adhesive tape 406. An electrode pad 402 is formed on the semiconductor chip 401. A gold ball bump 414 on the electrode pad 402 is formed.
A bonding wire 404 lengthened from a wire bonding starting point 415 on the lead wire 405 is connected to the gold ball bump 414. All of the adhesive tape 406, the semiconductor chip 401, the electrode pad 402, the gold ball bump 414, the bonding wire 404 and the wire bonding starting point 415 are sealed with a resin sealing body 407. A solder ball 408 is formed at the reverse side of the insulating film 410.
In this technique, with the object to miniaturize the semiconductor device, after forming the gold ball bump 414 on the electrode pad 402, a reverse wire bonding is preformed from the wire bonding starting point 415 to the gold ball bump 404, while lengthening the bonding wire 404 with an angle near to perpendicularity.